Double-gated transistors offer greater performance compared to conventional planar transistors. However, a problem has been how to fabricate such double-gated transistors. Current techniques being examined today include epitaxial growth to form the channel after gate oxidation and fin field effect transistors (FET). (“Fin” usually means a vertical silicon piece that is the gate, but there are many variations of fin-FETs.)
U.S. Pat. No. 6,451,656 B1 to Yu et al. describes a double-gated transistor on semiconductor-on-insulator (SOI).
U.S. Pat. No. 6,413,802 B1 to Hu et al. describes a double-gated FinFFET on semiconductor-on-insulator (SOI).
U.S. Pat. No. 6,365,465 B1 to Chan et al. also describes a process for a double-gated MOSFET on semiconductor-on-insulator (SOI).
U.S. Pat. No. 6,396,108 B1 to Krivokapic et al. describes a process for a double-gated MOSFET on semiconductor-on-insulator (SOI).